High temperature thermal processing equipment for semiconductor wafer fabrication: horizontal and vertical diffusion furnaces oxidation, annealing, doping , rapid thermal processing RTP systems for spike anneals at 1,000°C/second ramp rates, and specialized SiC annealing furnaces operating at 1,600°C. Controls the thermal budget — total heat exposure — that determines dopant activation, defect density, and ultimately transistor performance.
Semiconductor thermal processing (diffusion, RTP, SiC annealing) technology and investment research
High temperature thermal processing equipment for semiconductor wafer fabrication: horizontal and vertical diffusion furnaces oxidation, annealing, doping , rapid thermal processing RTP systems for spike anneals at 1,000°C/second ramp…
Every advanced node adds more thermal steps. GAA nanosheets require precise annealing to activate dopants in nanometer scale channels without diffusion that would blur the junction. SiC power semiconductors — critical for AI data center power conversion — require annealing at temperatures where silicon would melt. Amtech Systems ASYS is the only US public pure play in thermal processing, with Infineon, STMicroelectronics, and Wolfspeed as customers.
Research expansion in progress
Semiconductor thermal processing (diffusion, RTP, SiC annealing): technology and investment research
842 words · Vault research updated Jul 12, 2026
Technical bottleneck
- Bottleneck type: Process control / Temperature uniformity / SiC substrate warpage
- Technical constraint: Diffusion furnaces must maintain ±0.5°C temperature uniformity across 300mm wafers at 1,000-1,200°C for hours. RTP systems must ramp at 100-250°C/second and hold at peak temperature for <1 second with <2°C across-wafer variation. SiC processing requires 1,600°C+ with specialized susceptor materials (SiC-coated graphite) that don't contaminate the wafer.
- Economic constraint: Each furnace costs $500K-$2M; qualification with a major fab takes 12-18 months. The installed base creates a replacement cycle measured in decades — but SiC, GaN, and advanced packaging create greenfield demand.
Adoption
- Driver: GAA node transitions adding 30-50% more thermal steps; SiC wafer capacity expansion (Wolfspeed, STM, Infineon); advanced packaging warpage control; China domestic semiconductor buildout
- Blocker: Cyclical semicap spending; larger competitors (Tokyo Electron, Kokusai, NAURA) dominate broader thermal categories; ASYS niche micro-cap
Product categories
Horizontal diffusion furnaces, vertical diffusion furnaces, rapid thermal processing (RTP), SiC high-temperature annealing systems, wafer handling automation, wet processing chemistry (IDI/Candeo)
Public companies exposed
ASYS (Amtech Systems — primary US pure-play), Tokyo Electron (broader thermal + etch/dep), Kokusai Electric (diffusion/ALD), NAURA (China domestic thermal)
Validation signals
- ASYS backlog ~$22M; cash ~$84M post-financing; 15% insider ownership
- AI-related revenue >30% in key segments, trending toward 40%+
- Candeo wet chemistry product line launched June 2026 (IDI subsidiary)
- Infineon, STM, Wolfspeed named as customers
- Expected Russell index inclusion
Invalidation signals
Semi capex downturn; larger competitors commoditize thermal processing; China domestic tool displacement
Primary and supporting material
Sources
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What is Semiconductor thermal processing (diffusion, RTP, SiC annealing)?
High temperature thermal processing equipment for semiconductor wafer fabrication: horizontal and vertical diffusion furnaces oxidation, annealing, doping , rapid thermal processing RTP systems for spike anneals at 1,000°C/second ramp…
Which universe and layer is Semiconductor thermal processing (diffusion, RTP, SiC annealing) mapped to?
Semiconductor thermal processing (diffusion, RTP, SiC annealing) is mapped to Physical AI across AI Factory & Cloud Training Infrastructure.
Which stocks are mapped to Semiconductor thermal processing (diffusion, RTP, SiC annealing)?
Daily PXS currently maps 1 public stock to Semiconductor thermal processing (diffusion, RTP, SiC annealing), including ASYS.